談話会

2018年度談話会

通信情報システム専攻 2018年度談話会の概要

第1回

Time

Friday, April 20th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/en/access/index.html#s_bldg

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Dr. Keisuke Fujii

Physics Department, Graduate School of Science, Kyoto University

Title

Recent theoretical and experimental progress on quantum computing

Abstract

I will provide a pedagogical introduction of quantum computing, specifically its definition, how it is different from conventional probabilistic computation, and how it can solve certain problems much faster than conventional “classical” computers. Then, I will review recent progress on quantum computing from both theoretical and experimental aspects.

日時

2018年4月20日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

藤井 啓祐 氏

京都大学大学院理学研究科 物理学・宇宙物理学専攻

講演タイトル

量子コンピューティングの理論・実験の最近の進展

概要

量子コンピュータの仕組みや従来型のコンピュータとの違いを基礎から説明し、 どのようにして従来の古典コンピュータに対して高速にある種の問題に対して 解を見つけることができるのかを解説する。また、最近の理論的な進展や実験 的な取り組みについて紹介する。


第2回

Time

Friday, May 25th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/en/access/index.html#s_bldg

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Prof. Takehiro Sato

Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University

Title

Optical access network: History and recent topics

Abstract

A passive optical network (PON), which is an access network system using optical fiber cables and splitters, has pushed forward the popularization of fiber-to-the-home (FTTH). Due to its cost-effectiveness, not only residential Internet access but also other services such as 5G mobile backhauls are expected to be provided in the next-generation PON. This presentation first introduces the history and basic mechanism of optical access networks. Then the recent research topics in optical access networks, such as flexible utilization of network resources by applying virtualization techniques, are presented.

日時

2018年5月25日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

佐藤 丈博 先生

京都大学大学院情報学研究科 通信情報システム専攻

講演タイトル

Optical access network: History and recent topics

概要

A passive optical network (PON), which is an access network system using optical fiber cables and splitters, has pushed forward the popularization of fiber-to-the-home (FTTH). Due to its cost-effectiveness, not only residential Internet access but also other services such as 5G mobile backhauls are expected to be provided in the next-generation PON. This presentation first introduces the history and basic mechanism of optical access networks. Then the recent research topics in optical access networks, such as flexible utilization of network resources by applying virtualization techniques, are presented.


第3回

Time

Friday, June 15th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/en/access/index.html#s_bldg

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Dr. Shigeaki Okumura

FURUNO ELECTRIC CO., LTD.

Title

Signal processing techniques for non-invasive radar and ultrasound-based human measurement and their applications

Abstract

Recently, several non-invasive measurement techniques that measure outside and inside of the human body using radar and ultrasound-based devices have been reported. In this talk, we introduce the signal processing techniques and applications. Especially, we focus on adaptive signal processing techniques that suppress the interferences and extract the desired signals.

日時

2018年6月15日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

奥村 成皓 氏

古野電気株式会社

講演タイトル

レーダ・超音波を用いた非侵襲な人体測定における信号処理方法とそのアプリケーション

概要

レーダ・超音波を用いて非侵襲に人体の内部・外部を計測する技術が近年多く 開発されています。本講演ではそのアプリケーションと計測に重要な信号処理 手法を紹介します。講演では信号処理の中でも、不要な信号を抑圧し、所望の 信号を抽出するために用いられる適応型信号処理に重点をおいて説明致します。


第4回

Time

Friday, July 13th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/accms_web/en/access_en

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Prof. Priyank Kalla

Electrical and Computer Engineering University of Utah, Salt Lake City, USA

Title

Verification of Arithmetic Circuits Using Algebraic Geometry and Symbolic Computation

Abstract

Until a few years ago, automatic formal verification of arithmetic datapath circuits was considered an unsolvable problem. It was indeed impossible to formally verify custom-designed arithmetic circuits, automatically, beyond even 16-bit datapath word-lengths. Computational techniques quickly encountered exponential space and time explosion of complexity. In the past few years, the state-of-the-art in this area has witnessed a significant leap in verification capacity, facilitating verification for up to 500-bit wordlengths. Algebraic Geometry has played a fundamental role in this success – helping us understand the nature of the problem, and enabling algorithmic implementations to exploit domain-specific knowledge for efficiency and scalability.

In this talk, I will describe our work on formal verification of datapath designs using techniques that lie at the cross-roads of commutative algebra, algebraic geometry and electronic design automation (EDA) techniques. We particularly exploit the theory and technology of Gröbner bases to verify datapath circuits. Algorithms in computational algebraic geometry exhibit very high complexity. However, datapath designs exhibit some form of structure and symmetry in their functions and implementations. Our work has shown that the powerful Gröbner basis reasoning helps us discover this “structure and symmetry,” which can be exploited to simplify the algorithms, data-structures and implementations – thus enabling scalability. In this talk, I will describe the verification context, the problem formulations, our discoveries, and results. I will conclude the talk with discussions on other significant problems that can be solved by analyzing word-level abstractions of hardware designs using algebraic geometry. The talk should be accessible to electrical and computer engineers, (theoretical) computer scientists as well as algebraists.

日時

2018年7月13日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

Prof. Priyank Kalla

Electrical and Computer Engineering University of Utah, Salt Lake City, USA

講演タイトル

Verification of Arithmetic Circuits Using Algebraic Geometry and Symbolic Computation

概要

Until a few years ago, automatic formal verification of arithmetic datapath circuits was considered an unsolvable problem. It was indeed impossible to formally verify custom-designed arithmetic circuits, automatically, beyond even 16-bit datapath word-lengths. Computational techniques quickly encountered exponential space and time explosion of complexity. In the past few years, the state-of-the-art in this area has witnessed a significant leap in verification capacity, facilitating verification for up to 500-bit wordlengths. Algebraic Geometry has played a fundamental role in this success – helping us understand the nature of the problem, and enabling algorithmic implementations to exploit domain-specific knowledge for efficiency and scalability.

In this talk, I will describe our work on formal verification of datapath designs using techniques that lie at the cross-roads of commutative algebra, algebraic geometry and electronic design automation (EDA) techniques. We particularly exploit the theory and technology of Gröbner bases to verify datapath circuits. Algorithms in computational algebraic geometry exhibit very high complexity. However, datapath designs exhibit some form of structure and symmetry in their functions and implementations. Our work has shown that the powerful Gröbner basis reasoning helps us discover this “structure and symmetry,” which can be exploited to simplify the algorithms, data-structures and implementations – thus enabling scalability. In this talk, I will describe the verification context, the problem formulations, our discoveries, and results. I will conclude the talk with discussions on other significant problems that can be solved by analyzing word-level abstractions of hardware designs using algebraic geometry. The talk should be accessible to electrical and computer engineers, (theoretical) computer scientists as well as algebraists.


第5回

Time

Friday, October 19th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/accms_web/en/access_en

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Mr. Masamichi Kawarabayashi

Vice President, Strategy & Planning Division, Industrial Solution Business Unit, Renesas Electronics Corporation

Title

Semiconductor industry direction and solution technology

Abstract

Overview the semiconductor industry and the leading solution technologies, such as e-AI (embedded Artificial Intelligence) and DRP (Dynamic Reconfigurable Processor).

日時

2018年10月19日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

河原林 政道 氏

ルネサスエレクトロニクス株式会社 インダストリアルソリューション事業本部 事業計画統括部長

講演タイトル

半導体産業の動向とソリューション技術

概要

半導体産業の状況を概観し、半導体事業をけん引するソリューション技術の例 としてe-AI (embedded Artificial Intelligence) とDRP (Dynamic Reconfigurable Processor)を紹介する。


第6回

Time

Friday, November 16th 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/accms_web/en/access_en

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Prof. Anwar Hasan

Dept. of Electrical and Computer Engineering, University of Waterloo, Canada

Title

Low cost hardware/software algorithms for arithmetic in extended finite fields

Abstract

Finite fields (a.k.a. Galois fields) play an important role in areas such as cryptography, error control coding and the testing of integrated circuits. Some cryptosystems use very large finite fields. Performance of such cryptosystems depends on the efficiency of arithmetic operations over the finite fields used. Arithmetic operations over large finite fields are however not well supported by today’s general purpose processors. This talk critically looks into a number of low cost hardware/software algorithms for arithmetic over extended finite fields and brings up an unconventional trade-off between sequential multiplier and divider.

日時

2018年11月16日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

Prof. Anwar Hasan

Dept. of Electrical and Computer Engineering, University of Waterloo, Canada

講演タイトル

Low cost hardware/software algorithms for arithmetic in extended finite fields

概要

Finite fields (a.k.a. Galois fields) play an important role in areas such as cryptography, error control coding and the testing of integrated circuits. Some cryptosystems use very large finite fields. Performance of such cryptosystems depends on the efficiency of arithmetic operations over the finite fields used. Arithmetic operations over large finite fields are however not well supported by today’s general purpose processors. This talk critically looks into a number of low cost hardware/software algorithms for arithmetic over extended finite fields and brings up an unconventional trade-off between sequential multiplier and divider.


第7回

Time

Friday, December 21st 2018 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/accms_web/en/access_en

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Prof. Tatsuhiro Yokoyama

Research Institute for Sustainable Humanosphere, Kyoto University, Associate Professor

Title

Earth’s ionosphere and space weather prediction

Abstract

Earth’s upper atmosphere exists as partially ionized plasma, the so-called ionosphere. The phenomena originating from the Sun to the near-Earth space is called “space weather”. Radiowave propagating in the ionospheric plasma is often interfered and cause severe errors in communication and navigation systems. Brief introduction about space weather prediction and recent research topics on ionospheric observations and simulations is presented.

日時

2018年12月21日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

横山 竜宏 先生

京都大学 生存圏研究所 准教授

講演タイトル

地球電離圏と宇宙天気予報

概要

地球大気上部は、太陽紫外線の影響により一部が電離した状態(プラズマ)で 存在しており、電離圏と呼ばれている。太陽を起源とし、電離圏を含む地球周 辺の宇宙空間までの一連の自然現象を「宇宙天気」と呼び、その現況把握及び 予測を「宇宙天気予報」と呼んでいる。電離圏プラズマ中を伝搬する電波は、 反射、屈折、伝搬遅延といった影響を受け、GPS等の測位衛星の誤差の要因と なることから、電離圏の状況を正確に把握し、予測することが航空機・船舶等 の運用においても重要視されている。宇宙天気予報の概要と、電離圏の観測・ シミュレーション研究の取り組みについて紹介する。


第8回

Time

Friday, January 18th 2019 at 16:30-18:00

Location(s)
[Yoshida]

Room 202, South Bldg, Academic Center for Computing and Media Studies

http://www.media.kyoto-u.ac.jp/accms_web/en/access_en

[Uji]

S-143H Remote Lecture Room

[Yokosuka]

YRP Mobile Lab

Note: If you would like to attend from Yokosuka, let me know it in advance.

Speaker

Prof. Jaijeet Roychowdhury

University of California, Berkeley

Title

Computing with Oscillators

Abstract

In the 1950s, Eiichi Goto and John von Neumann showed how Boolean computation could be performed if logic states are encoded in the phase of oscillatory signals. However, the AC-pumped circuit realizations they proposed were not well suited for scaling and miniaturization, hence their scheme could not compete with the level-based logic now ubiquitous in IC implementations. We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation therefore becomes possible using a wide variety of natural and engineered oscillators (including CMOS realizations) as substrates. We indicate how phase-encoded logic has inherent noise immunity advantages over level-based logic, and can potentially perform logical operations in a single cycle with low energy consumption. We also show how self-sustaining oscillator networks can be used to implement Ising machines, and outline their considerable promise for solving hard (NP-complete) problems rapidly in hardware.

日時

2019年1月18日(金) 16:30-18:00

場所
[吉田]

学術情報メディアセンター南館 マルチメディア講義室202講義室

http://www.media.kyoto-u.ac.jp/access/#s_bldg

[宇治]

生存圏S-143H遠隔講義室

[横須賀]

京都大学YRPモバイルラボ

※ YRPで聴講される場合は世話人まで事前にご連絡ください。

講演者

Prof. Jaijeet Roychowdhury

University of California, Berkeley

講演タイトル

Computing with Oscillators

概要

In the 1950s, Eiichi Goto and John von Neumann showed how Boolean computation could be performed if logic states are encoded in the phase of oscillatory signals. However, the AC-pumped circuit realizations they proposed were not well suited for scaling and miniaturization, hence their scheme could not compete with the level-based logic now ubiquitous in IC implementations. We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation therefore becomes possible using a wide variety of natural and engineered oscillators (including CMOS realizations) as substrates. We indicate how phase-encoded logic has inherent noise immunity advantages over level-based logic, and can potentially perform logical operations in a single cycle with low energy consumption. We also show how self-sustaining oscillator networks can be used to implement Ising machines, and outline their considerable promise for solving hard (NP-complete) problems rapidly in hardware.